Yeah, but they are APPLICATION SPECIFIC. They perform essentially "one
program". And if you're talking "switches" the ASICs they have are all
about switching (basically bridges on a chip). ALL of the LB's have
"general purpose processors" inside them that deal with most of the Layer 4
and above stuff.
And even if they didn't - then I'd argue about upgradability in the code.
ASICs are still way too expensive to hand over the dynamic - feature
changing - fast-paced world of the Internet. They'd have to be designing
new chips faster than they could produce them - and it would require a
forklift upgrade every time.
So . . . point taken - and yes it depends on what "packet rewrites" really
means. :-)
----- Original Message -----
From: "tony bourke" <tonyIZZATvegan.net>
To: <lb-lIZZATvegan.net>
Sent: Friday, February 16, 2001 9:34 PM
Subject: Re: [load balancing] Cascading switches off of a Foundry switch
> remember, ASICs are processors too, the only difference is that ASICs are
> designed with a single purpose in mind such as IP functions, rather than
> the ability to run Microsoft Word in addition to packet rewrites.
>
> Doing so skips several layers of abstraction, which is why they are
> faster.
>
> Tony
>
>
> On Fri, 16 Feb
> 2001, Nimesh Vakharia wrote:
>
> >
> > > I doubt that the packet rewrites are taking place in ASIC - anytime
you go
> > > above layer 2 doing dynamic stuff you've got to have a processor and
ram.
> > >
> > Possible, this is what our sales/SE guys implied (its all
> > ASIC)... its quite possible it was a sales gimmick...
> >
> > Nimesh.
> >
>
> -------------- -- ---- ---- --- - - - - - -- - - - - - -
> Tony Bourke tonyIZZATvegan.net
>
>
>
This archive was generated by hypermail 2b30 : Sat Feb 17 2001 - 00:32:14 EST